封装信息
| 封装 | 引脚 DSBGA (YCG) | 36 |
| 工作温度范围 (°C) -40 to 85 |
| 包装数量 | 包装 3,000 | LARGE T&R |
TAS2572 的特性
- Powerful class-D amplifier
- 6.6 W 1% THD+N
- 13V boost with 4.0A max current limit
- Best in class efficiency
- Upto 90% efficiency at system level
- 4.8mW idle channel power
- Integrated Y-bridge
- Advanced 33mV step size class-H boost
- High performance audio channel
- 7µV A-wt. idle channel noise
- 109dB Dynamic Range
- -90dB THDN
- Low EMI performance
- Advanced integrated features
- Integrated Speaker IV sense
- Signal detection high efficiency modes
- High accuracy voltage monitor & temp sensor
- Programmable battery input current limit
- Ease of use features
- 1cell, 2cell and 3cell Li-ion battery support
- Clock based power up/down
- Auto clock rate detection: 16kHz to 192kHz
- Integrated ultrasonic tone generator
- External 14V PVDD supply support
- MCLK free operation
- Thermal and over current protection
- Programmable drive strength IO buffers
- Power Supplies and user
interface
- VBAT: 2.5 V to 5.5 V
- VDD: 1.65 V to 1.95 V
- IOVDD: 1.2V or 1.8V
- I 2S/TDM: 8 channels
- I 2C: 4 selectable addresses
- WCSP package
TAS2572 的说明
The TAS2572 is a digital input Class-D audio amplifier with an integrated Boost for higher power delivery in battery-operated systems. The device has integrated speaker voltage and current sense (IV-Sense) for real-time monitoring of the loudspeakers. IV-sense data can be used to run speaker protection algorithms on a host DSP to enable high output SPL while keeping speakers in a safe operating region.
The device is optimized for delivering the best battery life for real use cases of Music playback and Voice calls. Advanced efficiency optimization features like Class-H , Y-bridge and algorithms enable the device to produce best-in-class efficiency across all power regions of operation. The Class-D amplifier is capable of delivering 6.6 W output power using the integrated Class-H 13 V Boost.
A battery tracking peak voltage limiter and a battery voltage monitor ADC enables advanced battery monitoring algorithms on the host processor to manage peak output power delivery while avoiding any audio distortion when battery capacity is depleting.
Up to four devices can share a common bus via I 2S/TDM + I 2C interfaces.