TPS51116EVM-001
TPS51116 存储器电源解决方案，同步降压控制器评估模块
TPS51116EVM-001
概述
The TPS51116EVM evaluation module (EVM) is a dual-output converter for DDR and DDRII memory modules. It uses a 10 A synchronous buck converter to provide the core voltage (VDDQ) for DDR memory modules. The EVM is designed to use a 4.5 V to 28 V supply voltage and a 4.75 V to 5.25 V controller bias supply. This allows the EVM to start up from a single 5 V supply or operate from a wide range of supply voltages with low power 5 V bias supply. The TPS51116EVM provides several jumpers and switches to allow the user to evaluate all of the TPS51116's configurations including lossless RDS(on) or resistive current sensing, current mode or D-CAP™ semi-hysteretic operation, DDR or DDRII voltage standards and the S3 and S5 sleep states.
特性
- Up to 85% efficiency on the VDDQ switching regulator output
- Dual switching regulator / LDO output for both DDR core and termination voltages
- ± 3 A sink/source termination voltage LDO regulator
- 10 mA termination reference voltage for DDR input reference
- User selectable DDR and DDRII or externally referenced supply voltages
- User selectable switching regulator or external supply source for LDO termination regulator
- Switches available for testing S3 and S5 sleep states
DDR 存储器电源 IC
MOSFET
多通道 IC (PMIC)
技术文档
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| 类型 | 标题 | 下载最新的英文版本 | 日期 | |||
|---|---|---|---|---|---|---|
| * | 用户指南 | Using the TPS51116 (Rev. A) | 2008年 11月 12日 | |||
| 证书 | TPS51116EVM-001 EU Declaration of Conformity (DoC) | 2019年 1月 2日 | ||||
| 数据表 | TPS51116 全套 DDR、DDR2、DDR3、DDR3L、LPDDR3 和 DDR4 电源解决方案同步降压控制器、3A LDO、缓冲基准 数据表 (Rev. J) | PDF | HTML | 英语版 (Rev.J) | PDF | HTML | 2018年 4月 3日 |