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SN74CB3Q3245

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3.3V、1:1 (SPST)、8 通道 FET 总线开关

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SN74CB3Q3245

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产品详情

Configuration 1:1 SPST Number of channels 8 Power supply voltage - single (V) 2.5, 3.3 Protocols Analog Ron (typ) (Ω) 4 CON (typ) (pF) 9 Supply current (typ) (µA) 1000 Bandwidth (MHz) 500 Operating temperature range (°C) -40 to 85 Features Powered-off protection, Supports input voltage beyond supply Input/output continuous current (max) (mA) 64 Rating Catalog Drain supply voltage (max) (V) 3.6 Supply voltage (max) (V) 3.6
Configuration 1:1 SPST Number of channels 8 Power supply voltage - single (V) 2.5, 3.3 Protocols Analog Ron (typ) (Ω) 4 CON (typ) (pF) 9 Supply current (typ) (µA) 1000 Bandwidth (MHz) 500 Operating temperature range (°C) -40 to 85 Features Powered-off protection, Supports input voltage beyond supply Input/output continuous current (max) (mA) 64 Rating Catalog Drain supply voltage (max) (V) 3.6 Supply voltage (max) (V) 3.6
SSOP (DBQ) 20 51.9 mm² 8.65 x 6 TSSOP (PW) 20 41.6 mm² 6.5 x 6.4 TVSOP (DGV) 20 32 mm² 5 x 6.4 VQFN (RGY) 20 15.75 mm² 4.5 x 3.5
  • High-Bandwidth Data Path (Up to 500 MHz)
  • Equivalent to IDTQS3VH384 Device
  • 5-V Tolerant I/Os with Device Powered-Up or Powered-Down
  • Low and Flat ON-State Resistance (ron) Characteristics Over Operating Range (ron = 4 Typical)
  • Rail-to-Rail Switching on Data I/O Ports
    • 0- to 5-V Switching With 3.3-V VCC
    • 0- to 3.3-V Switching With 2.5-V VCC
  • Bidirectional Data Flow, With Near-Zero Propagation Delay
  • Low Input/Output Capacitance Minimizes Loading and Signal Distortion (Cio(OFF) = 3.5 pF Typical)
  • Fast Switching Frequency (fOE\ = 20 MHz Max)
  • Data and Control Inputs Provide Undershoot Clamp Diodes
  • Low Power Consumption (ICC = 1 mA Typical)
  • VCC Operating Range From 2.3 V to 3.6 V
  • Data I/Os Support 0 to 5-V Signaling Levels (0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)
  • Control Inputs Can be Driven by TTL or 5-V/3.3-V CMOS Outputs
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
  • Supports Both Digital and Analog Applications: PCI Interface, Differential Signal Interface, Memory Interleaving, Bus Isolation, Low-Distortion Signal Gating

For additional information regarding the performance characteristics of the CB3Q family, refer to the TI application report, CBT-C, CB3T, and CB3Q Signal-Switch Families, literature number SCDA008.
  • High-Bandwidth Data Path (Up to 500 MHz)
  • Equivalent to IDTQS3VH384 Device
  • 5-V Tolerant I/Os with Device Powered-Up or Powered-Down
  • Low and Flat ON-State Resistance (ron) Characteristics Over Operating Range (ron = 4 Typical)
  • Rail-to-Rail Switching on Data I/O Ports
    • 0- to 5-V Switching With 3.3-V VCC
    • 0- to 3.3-V Switching With 2.5-V VCC
  • Bidirectional Data Flow, With Near-Zero Propagation Delay
  • Low Input/Output Capacitance Minimizes Loading and Signal Distortion (Cio(OFF) = 3.5 pF Typical)
  • Fast Switching Frequency (fOE\ = 20 MHz Max)
  • Data and Control Inputs Provide Undershoot Clamp Diodes
  • Low Power Consumption (ICC = 1 mA Typical)
  • VCC Operating Range From 2.3 V to 3.6 V
  • Data I/Os Support 0 to 5-V Signaling Levels (0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)
  • Control Inputs Can be Driven by TTL or 5-V/3.3-V CMOS Outputs
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
  • Supports Both Digital and Analog Applications: PCI Interface, Differential Signal Interface, Memory Interleaving, Bus Isolation, Low-Distortion Signal Gating

For additional information regarding the performance characteristics of the CB3Q family, refer to the TI application report, CBT-C, CB3T, and CB3Q Signal-Switch Families, literature number SCDA008.

The SN74CB3Q3245 is a high-bandwidth FET bus switch utilizing a charge pump to elevate the gate voltage of the pass transistor, providing a low and flat ON-state resistance (ron). The low and flat ON-state resistance allows for minimal propagation delay and supports rail-to-rail switching on the data input/output (I/O) ports. The device also features low data I/O capacitance to minimize capacitive loading and signal distortion on the data bus. Specifically designed to support high-bandwidth applications, the SN74CB3Q3245 provides an optimized interface solution ideally suited for broadband communications, networking, and data-intensive computing systems.

The SN74CB3Q3245 is organized as an 8-bit bus switch with a single output-enable (OE\) input. When OE\ is low, the bus switch is ON and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE\ is high, the bus switch is OFF and a high-impedance state exists between the A and B ports.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry prevents damaging current backflow through the device when it is powered down. The device has isolation during power off.

To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN74CB3Q3245 is a high-bandwidth FET bus switch utilizing a charge pump to elevate the gate voltage of the pass transistor, providing a low and flat ON-state resistance (ron). The low and flat ON-state resistance allows for minimal propagation delay and supports rail-to-rail switching on the data input/output (I/O) ports. The device also features low data I/O capacitance to minimize capacitive loading and signal distortion on the data bus. Specifically designed to support high-bandwidth applications, the SN74CB3Q3245 provides an optimized interface solution ideally suited for broadband communications, networking, and data-intensive computing systems.

The SN74CB3Q3245 is organized as an 8-bit bus switch with a single output-enable (OE\) input. When OE\ is low, the bus switch is ON and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE\ is high, the bus switch is OFF and a high-impedance state exists between the A and B ports.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry prevents damaging current backflow through the device when it is powered down. The device has isolation during power off.

To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
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类型 标题 下载最新的英语版本 日期
* 数据表 SN74CB3Q3245 数据表 (Rev. B) 2003年 11月 20日
应用手册 选择正确的德州仪器 (TI) 信号开关 (Rev. E) PDF | HTML 英语版 (Rev.E) PDF | HTML 2022年 8月 5日
应用手册 CBT-C、CB3T 和 CB3Q 信号开关系列 (Rev. C) PDF | HTML 英语版 (Rev.C) PDF | HTML 2022年 3月 11日
应用手册 多路复用器和信号开关词汇表 (Rev. B) 英语版 (Rev.B) PDF | HTML 2022年 3月 11日
应用简报 利用关断保护信号开关消除电源时序 (Rev. C) 英语版 (Rev.C) PDF | HTML 2021年 10月 21日
选择指南 Logic Guide (Rev. AB) 2017年 6月 12日
应用手册 Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 2015年 12月 2日
选择指南 逻辑器件指南 2014 (Rev. AA) 最新英语版本 (Rev.AB) 2014年 11月 17日
用户指南 LOGIC Pocket Data Book (Rev. B) 2007年 1月 16日
更多文献资料 Digital Bus Switch Selection Guide (Rev. A) 2004年 11月 10日
应用手册 Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004年 7月 8日
用户指南 Signal Switch Data Book (Rev. A) 2003年 11月 14日
应用手册 Bus FET Switch Solutions for Live Insertion Applications 2003年 2月 7日

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用户指南: PDF
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仿真模型

SN74CB3Q3245 IBIS Model (Rev. A)

SCDM044A.ZIP (25 KB) - IBIS Model
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参考设计

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SSOP (DBQ) 20 Ultra Librarian
TSSOP (PW) 20 Ultra Librarian
TVSOP (DGV) 20 Ultra Librarian
VQFN (RGY) 20 Ultra Librarian
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