LP38513-ADJ

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具有低噪声和使能功能的 3A、可调节超低压降稳压器

产品详情

Output options Adjustable Output Iout (max) (A) 3 Vin (max) (V) 5.5 Vin (min) (V) 2.25 Vout (max) (V) 5 Vout (min) (V) 0.5 Rating Catalog Noise (µVrms) 25 PSRR at 100 KHz (dB) 28 Iq (typ) (mA) 8 Thermal resistance θJA (°C/W) 67 Load capacitance (min) (µF) 10 Regulated outputs (#) 1 Features Enable Accuracy (%) 2 Dropout voltage (Vdo) (typ) (mV) 470 Operating temperature range (°C) -40 to 125
Output options Adjustable Output Iout (max) (A) 3 Vin (max) (V) 5.5 Vin (min) (V) 2.25 Vout (max) (V) 5 Vout (min) (V) 0.5 Rating Catalog Noise (µVrms) 25 PSRR at 100 KHz (dB) 28 Iq (typ) (mA) 8 Thermal resistance θJA (°C/W) 67 Load capacitance (min) (µF) 10 Regulated outputs (#) 1 Features Enable Accuracy (%) 2 Dropout voltage (Vdo) (typ) (mV) 470 Operating temperature range (°C) -40 to 125
TO-263 (NDQ) 5 142.3416 mm² 10.16 x 14.01
  • 2.25V to 5.5V Input Voltage Range
  • Adjustable Output Voltage Range of 0.5V to 4.5V
  • 3.0A Output Load Current
  • ±2.0% Accuracy over Line, Load, and Full-Temperature Range from -40°C to +125°C
  • Stable with tiny 10 µF ceramic capacitors
  • Enable pin
  • Typically less than 1 µA of Ground pin current when Enable pin is low
  • 25dB of PSRR at 100 kHz
  • Over-Temperature and Over-Current Protection
  • TO-263 THIN 5-Pin Surface Mount Package

All trademarks are the property of their respective owners.

  • 2.25V to 5.5V Input Voltage Range
  • Adjustable Output Voltage Range of 0.5V to 4.5V
  • 3.0A Output Load Current
  • ±2.0% Accuracy over Line, Load, and Full-Temperature Range from -40°C to +125°C
  • Stable with tiny 10 µF ceramic capacitors
  • Enable pin
  • Typically less than 1 µA of Ground pin current when Enable pin is low
  • 25dB of PSRR at 100 kHz
  • Over-Temperature and Over-Current Protection
  • TO-263 THIN 5-Pin Surface Mount Package

All trademarks are the property of their respective owners.

The LP38513-ADJ Fast-Transient Response Low-Dropout Voltage Regulator offers the highest-performance in meeting AC and DC accuracy requirements for powering Digital Cores. The LP38513-ADJ uses a proprietary control loop that enables extremely fast response to change in line conditions and load demands. Output Voltage DC accuracy at 2.5% over line, load and full temperature range from -40°C to +125°C. The LP38513-ADJ is designed for inputs from the 2.5V, 3.3V, and 5.0V rail, is stable with 10 μF ceramic capacitors, and has an adjustable output voltage. The LP38513-ADJ provides excellent transient performance to meet the demand of high performance digital core ASICs, DSPs, and FPGAs found in highly-intensive applications such as servers, routers/switches, and base stations.

The LP38513-ADJ Fast-Transient Response Low-Dropout Voltage Regulator offers the highest-performance in meeting AC and DC accuracy requirements for powering Digital Cores. The LP38513-ADJ uses a proprietary control loop that enables extremely fast response to change in line conditions and load demands. Output Voltage DC accuracy at 2.5% over line, load and full temperature range from -40°C to +125°C. The LP38513-ADJ is designed for inputs from the 2.5V, 3.3V, and 5.0V rail, is stable with 10 μF ceramic capacitors, and has an adjustable output voltage. The LP38513-ADJ provides excellent transient performance to meet the demand of high performance digital core ASICs, DSPs, and FPGAs found in highly-intensive applications such as servers, routers/switches, and base stations.

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类型 标题 下载最新的英语版本 日期
* 数据表 3A Fast-Transient Response Adjustable Low-Dropout Linear Voltage Regulator 数据表 (Rev. C) 2013年 4月 1日
EVM 用户指南 AN-1670 LP38513TJ-ADJ Evaluation Board (Rev. B) 2013年 4月 24日
应用手册 AN-1797 TO-263 THIN Package (Rev. A) 2013年 4月 24日
应用手册 Application Note 1797 TO-263 THIN Package (cn) 最新英语版本 (Rev.A) 2008年 3月 10日

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评估板

LP38513TJ-ADJEV — LP38513-ADJ 3A 快速瞬态响应、可调节低压降线性电压稳压器 EVM

LP38513-ADJ 3A Fast-Transient Response Adjustable Low-Dropout Linear Voltage Regulator Evaluation Board

用户指南: PDF
TI.com 上无现货
参考设计

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此参考设计介绍了一个宽带射频接收器,该接收器利用 4 GSPS 模数转换器 (ADC) 并具有一个 8GHz 直流耦合全差动放大器前端。放大器前端提供信号增益并允许采集下行到直流的信号,而平衡-非平衡变压器耦合输入则做不到这一点。

设计指南: PDF
原理图: PDF
参考设计

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此系统级设计展示了如何使用 Xilinx VC707 平台一起同步两个 ADC12J4000 评估模块 (EVM)。此设计文档介绍了必要的硬件修改和器件配置,包括时钟方案。此设计显示了每个 EVM 的示例配置文件。此设计介绍了 FPGA 固件,并显示相关的 Xilinx IP 块配置参数。此外还显示并分析了在实际硬件上采集的数据,测试结果显示出 50ps 内的同步,未使用特性化电缆,也未校准传播延迟。
设计指南: PDF
原理图: PDF
封装 引脚 CAD 符号、封装和 3D 模型
TO-263 (NDQ) 5 Ultra Librarian

订购和质量

包含信息:
  • RoHS
  • REACH
  • 器件标识
  • 引脚镀层/焊球材料
  • MSL 等级/回流焊峰值温度
  • MTBF/时基故障估算
  • 材料成分
  • 鉴定摘要
  • 持续可靠性监测
包含信息:
  • 制造厂地点
  • 封装厂地点

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