LM3881

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具有可调节延时时间的 3 电压轨简易电源序列发生器

产品详情

Supply voltage (min) (V) 2.7 Number of supplies monitored 3 Supply voltage (max) (V) 5.5 Iq (typ) (mA) 0.08 Number of sequenced outputs 3 Rating Catalog Operating temperature range (°C) -40 to 125
Supply voltage (min) (V) 2.7 Number of supplies monitored 3 Supply voltage (max) (V) 5.5 Iq (typ) (mA) 0.08 Number of sequenced outputs 3 Rating Catalog Operating temperature range (°C) -40 to 125
VSSOP (DGK) 8 14.7 mm² 3 x 4.9
  • Easiest Method to Sequence Rails
  • Power-Up and Power-Down Control
  • Tiny Footprint
  • Low Quiescent Current of 80 µA
  • Input Voltage Range of 2.7 V to 5.5 V
  • Output Invert Feature
  • Timing Controlled by Small Value External
    Capacitor
  • Easiest Method to Sequence Rails
  • Power-Up and Power-Down Control
  • Tiny Footprint
  • Low Quiescent Current of 80 µA
  • Input Voltage Range of 2.7 V to 5.5 V
  • Output Invert Feature
  • Timing Controlled by Small Value External
    Capacitor

The LM3881 Simple Power Sequencer offers the easiest method to control power up and power down of multiple power supplies (switching or linear regulators). By staggering the start-up sequence, it is possible to avoid latch conditions or large inrush currents that can affect the reliability of the system.

Available in VSSOP-8 package, the Simple Sequencer contains a precision enable pin and three open-drain output flags. When the LM3881 is enabled, the three output flags will sequentially release, after individual time delays, thus permitting the connected power supplies to start up. The output flags will follow a reverse sequence during power down to avoid latch conditions. Time delays are defined using an external capacitor and the output flag states can be inverted by the user.

The LM3881 Simple Power Sequencer offers the easiest method to control power up and power down of multiple power supplies (switching or linear regulators). By staggering the start-up sequence, it is possible to avoid latch conditions or large inrush currents that can affect the reliability of the system.

Available in VSSOP-8 package, the Simple Sequencer contains a precision enable pin and three open-drain output flags. When the LM3881 is enabled, the three output flags will sequentially release, after individual time delays, thus permitting the connected power supplies to start up. The output flags will follow a reverse sequence during power down to avoid latch conditions. Time delays are defined using an external capacitor and the output flag states can be inverted by the user.

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技术文档

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类型 标题 下载最新的英语版本 日期
* 数据表 LM3881 Simple Power Sequencer With Adjustable Timing 数据表 (Rev. D) PDF | HTML 2014年 12月 10日
选择指南 电源管理指南 2018 (Rev. K) 2018年 7月 31日
选择指南 电源管理指南 2018 (Rev. R) 2018年 6月 25日
技术文章 How to manage processor power during uncontrolled power off PDF | HTML 2018年 6月 21日
技术文章 Sequencing solutions: simple, reliable and cost-effective PDF | HTML 2017年 9月 27日
技术文章 A simple six-channel power-rail sequencing solution PDF | HTML 2015年 11月 16日
EVM 用户指南 AN-1785 LM3881 Power Sequencer Evaluation Board (Rev. C) 2013年 5月 7日
应用手册 Power Supply Design Considerations for Modern FPGAs 2010年 2月 2日

设计和开发

如需其他信息或资源,请点击以下任一标题进入详情页面查看(如有)。

评估板

LM3881EVAL — 用于 LM3881 电源序列发生器的评估板

This evaluation board is designed to permit the designer to connect it directly to the Enable or Remote ON/Off pins of power supply devices of an existing system to facilitate system sequencing. Upon enabling the device, the three open drain output flags will rise in sequential order, 1-2-3. Once (...)

用户指南: PDF
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模拟工具

PSPICE-FOR-TI — 适用于 TI 设计和模拟工具的 PSpice®

PSpice® for TI 可提供帮助评估模拟电路功能的设计和仿真环境。此功能齐全的设计和仿真套件使用 Cadence® 的模拟分析引擎。PSpice for TI 可免费使用,包括业内超大的模型库之一,涵盖我们的模拟和电源产品系列以及精选的模拟行为模型。

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在 PSpice for TI 设计和仿真工具中,您可以搜索 TI (...)
参考设计

TIDA-01466 — 适用于超声前端的低电压低噪声电源参考设计

该参考设计是一款经过优化的电源,专门用于为超声波成像系统的八个 16 通道接收 AFE IC 供电。该设计使用单芯片直流/直流转换器 + LDO 组合稳压器将每个 LDO 输入设置为恰好高于压降电压,同时充分利用 LDO PSRR,从而减少部件数,同时最大限度地提高效率。此外,超低噪声 LDO 有助于实现可能的最高模数转换分辨率,从而实现更高的图像质量。该设计能够使开关频率与主时钟频率和系统时钟频率同步,从而帮助系统设计人员应用简单的滤波技术来消除接地回路上的电源开关噪声或使用扩频时钟来降低 EMI。此外,该设计实现了电子保险丝器件,从而提供一种简单灵活的过流保护方法。
设计指南: PDF
原理图: PDF
参考设计

TIDA-01568 — 12mm x 12mm、5 轨应用处理器电源定序参考设计

This reference design demonstrates a validated and cost competitive power sequencing solution for an application processor or a high performance control platform. This design supports 5 different voltage rails, optimized with layout space of 12 mm × 12 mm. The design is also capable of (...)
设计指南: PDF
原理图: PDF
参考设计

TIDA-010011 — 适用于保护继电器处理器模块的高效电源架构参考设计

This reference design showcases various power architectures for generating multiple voltage rails for an application processor module, requiring >1A load current and high efficiency . The required power supply is generated using 5-, 12- or 24-V DC input from the backplane. Power supplies are (...)
原理图: PDF
封装 引脚 CAD 符号、封装和 3D 模型
VSSOP (DGK) 8 Ultra Librarian

订购和质量

包含信息:
  • RoHS
  • REACH
  • 器件标识
  • 引脚镀层/焊球材料
  • MSL 等级/回流焊峰值温度
  • MTBF/时基故障估算
  • 材料成分
  • 鉴定摘要
  • 持续可靠性监测
包含信息:
  • 制造厂地点
  • 封装厂地点

支持和培训

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